BitField

SCI ISR (Interrupt Service Routine)

easyDSP uses an SCI interrupt to communicate with TMS320F28x. Therefore, the user program should include SCI ISR (Interrupt Service Routine) code which easyDSP provides. It depends on TMS320F28x type.
note) For F2838x CM, DriverLib based source file should be used.

C2000 series

SCI ISR files

F28001x
F28002x
F28003x
F28004x
F2807x
F2837x
F2838xS CPU1
F2838xD CPU1
F2838xD CPU2 
F28P55x
F28P65x

easy28x_bitfield_v11.2.c 
easy28x_bitfield_v11.2.h 

C2834x
F2823x/2833x
F2802x/F2802x0
F2803x
F2805x
F2806x
F280x
F281x
F28044

easy28x_gen2_bitfield_v9.4.c
easy28x_gen2_bitfield_v9.4.h

Name and its role of key functions in ISR code is
easyDSP_SCI_Init() : Initializes SCI
easy_RXINT_ISR() : ISR for RX_INT
easy_TXINT_ISR() : ISR for TX_INT
easyDSP_SPI_Flashrom_Init() : for external SPI flashrom booting of C2834x
easyDSP_Boot_Sync() : multi-core MCU (F2837xD, F2838xS, F2838xD) boot and synchronization

You SHOULD change some #define variables in the header file (not source file) accordingly to your target system. 
For example, below selection is targeting for F2807x + CPUCLK 150MHz + LSPCLK = CPUCLK/4 + easyDSP communication @ 115200 bps.

#define F28P65xS                             0
#define F28P65xD_CPU1                     0
#define F28P65xD_CPU1_CPU2              0
#define F28002x                            0
#define F28003x                            0
#define F28004x                            0
#define F2807x                              0
#define F2837xS                            0
#define F2837xD_CPU1                    0
#define F2837xD_CPU1_CPU2            0
#define F2838xS_CPU1                    0
#define F2838xS_CPU1_CM              0
#define F2838xD_CPU1                    0
#define F2838xD_CPU1_CPU2            0
#define F2838xD_CPU1_CM               0
#define F2838xD_CPU1_CPU2_CM       1

#define CPU_CLK           150000000L
#define LSP_CLK            (CPU_CLK/4)
#define BAUDRATE        115200L

Please note that in case of MotorWare™, LSP_CLK should be same to CLK_CLK. 
All variables in the ISR have prefix ‘ezDSP_’. Please don’t change these variables during your easyDSP operation.

Interrupt Nesting

Interrupts are automatically disabled when an interrupt service routine begins. In other words, once easyDSP ISR has been executed, your higher priority ISR can't be executed until easyDSP ISR has been completed.
easyDSP source file provides buit-in interrupt nesting function assuming easyDSP SCI ISR  has the lowest priority.
For further information about interrupt nesting, please check
http://processors.wiki.ti.com/index.php/Interrupt_Nesting_on_C28x

Run easyDP ISR fast on the flash

To run easyDSP ISR fast and stable when system is running on the flash, please use #pragma in the top-most part of easyDSP source file. Please refer to TI application note for 'ramfuncs' or '.TI.ramfunc' section operation.

in the part of header file easy28x_bitfield.h
#if (F2823x || F2833x || C2834x)
#pragma CODE_SECTION(easy_RXINT_ISR, "ramfuncs");
#else
#pragma CODE_SECTION(easy_RXINT_ISR, ".TI.ramfunc");
#endif

NOTE) ".TI.ramfunc" is used instead of "ramfuncs" in case the latest MCU (ex, 2837x, 2807x, 28004x) is used with the latest TI Support Library version (and compiler). Please check the file "F28x_SysCtrl.c" to understand which one is proper.
NOTE) Especially when your program runs on the flash and program/erase the flash at the same time with TI flash API, ISR of easyDSP should run on the ram, not on the flash. Any ISR routines that are executed during flash API function call must completely reside outside of the flash and must not expect to read data from the flash.

Single core programming 

easyDSP requires appropriate interrupt settings to communicate with MCU. Below box shows its example. At first, please set up the other interrupts except SCI. Then, call easyDSP_SCI_Init(). In the call to the functions, related registers are set up for SCI communication and interrupts. Also please check main_gen2.c or main_gen3.c example file in the source/C2000/bitfield folder.

#include " easy28x_bitfield_v11.2.h"  or ....
#include " easy28x_gen2_bitfield_v9.4.h"  or ....
main(void) {


    // below function should be called after other interrupts settings and before while(1) 
    easyDSP_SCI_Init();

    while(1) {
    }
}


C2834x programming for external SPI flash 

Since 2834x doesn't have internal flash, easyDSP supports external flashs with SPI interface. They are AT25DF021(2M bit), AT25DF041(4M bit), AT26DF081(8M bit), AT25DF321(32M bit), M25P20(2M bit), M25P40(4M bit), M25P80(8M bit), M25P16(16M bit), M25P32(32M bit) manufactured by ATMEL or Numonyx. SPI-A port setting is necessary for this.
Also please check main_gen2.c example file in the source/C2000/bitfield folder.

#include "easy28x_gen2_bitfield_v9.4.h " 

  
 main(void) {
 
 
    // SCI port setting for easyDSP

    easyDSP_SCI_Init(); 
 

  
//SPI-A port setting for external flash
easyDSP_SPI_Flashrom_Init();
  
    while(1) {
    }
}


F2837xD, F28P65xD, F2838xD multi core programming  

The use of header file and easyDSP_SCI_Init() function is same to that of single core MCU.
In addtion, easyDSP_Boot_Sync() function is required to boot and synchronize CPU2 and CM.
This function should be called in all cores (CPU1, CPU2 and CM) program. 
Pease check main_gen3.c example file in the source/C2000/bitfield folder. 

#include "easy28x_bitfield_v11.2.h"
main(void) { 

    InitSysCtrl();
    ......

    // if CPU1 program, allocate the necessary sharable memory to CPU2 and CM
    // before easyDSP_Boot_Sync() is called

    // call this after sharable memory allocation and before  easyDSP_SCI_Init() 
    easyDSP_Boot_Sync();

    easyDSP_SCI_Init();

    while(1) {
    }
}